mp240 mp240u 1 mp240 general description the mp240 operational amplifer is a surface mount constructed component that provides a cost effective solution in many industrial applications. the mp240 offers outstanding performance that rivals much more expensive hybrid components yet has a footprint of only 4.7 sq in. the mp240 has many optional fea - tures such as four-wire current limit sensing, a shut - down control and external compensation. in addition, the class a/b output stage biasing can be turned off for lower quiescent current with class c operation in applications where crossover distortion is less impor - tant such as when driving motors, for example. a boost voltage feature biases the output stage for close linear swings to the supply rail for extra effcient operation. the mp240 is built on a thermally conductive but elec - trically insulating substrate that can be mounted to a heat sink. features ? low cost ? high voltage - 200 volts ? high output current - 20 amps ? 170 watt dissipation capability applications ? motor drive ? magnetic deflection ? programmable power supplies ? industrial audio amplifier power operational amplifier mp240 p r o d u c t i n n o v a t i o n f r o m equivalent circuit diagram r1 41 42 r11 r7 r9 q1a q1b q11a q11b r2 r10 r8 q10 q15 r14 +vs -in +in -vs +vb r6 q2 c2 r3 r13 q14 -vb q3 q13 r12 r5 q5 q6 d1 q4 cc1 cc2 1 4 6 38 c1 c3 40 gnd 2 gnd r4 q17 d2 +i lim 36 35 -i lim d3 q18 q19 out out 12-14 9-11 24-26 27-29 level shift 3.9k r13 r15 q20 q21 r16 q16 7 8 lsd hsd iq 5 q3a q13a r12a r5a +vs 18-20 out 15-17 out 30-32 -vs 21-23 copyright ? cirrus logic, inc. 2009 (all rights reserved) http://www.cirrus.com sep 2009 apex ? mp240urevh p r o d u c t i n n o v a t i o n f r o m
mp240 2 mp240u parameter symbol min max units supply voltage, +v s to -v s 200 v output current, +v b (note 6) +v s + 15v v power dissipation, -v b (note 6) -v s - 15v v output current, peak, within soa 25 a power dissipation, internal, dc 170 w input voltage +v b to -v b v temperature, pin solder, 10s 225 c temperature, junction (note 2) 150 c temperature range, storage ?40 105 c operating temperature, case ?40 85 c characteristics and specifications absolute maximum ratings parameter test conditions min typ max units input offset voltage 1 5 mv offset voltage vs. temperature full temperature range 20 50 v/c offset voltage vs. supply 20 v/v bias current, initial (note 3) 100 pa bias current vs. supply 0.1 pa/v offset current, initial 50 pa input impedance, dc 100 g? input capacitance 4 pf common mode voltage range +v b - 15 v common mode voltage range -v b + 15 v common mode rejection, dc 92 db differential input voltage 25 v noise 1mhz bandwidth, 1k? r s 5 v rms shutdown, active hsd - lsd 4.5 5 5.5 v shutdown, inactive hsd - lsd -0.5 0 0.25 v gain open loop @ 15hz r l = 1k?, c c = 100pf 96 db gain bandwidth product @ 1mhz c c = 100pf 1.8 mhz phase margin full temperature range 60 output voltage swing i o = 20a +v s - 10 +v s - 7 v voltage swing i o = -20a -v s + 10 -v s + 8 v voltage swing i o = 20a, +v b = +v s +10v +v s - 3.0 +v s - 2.0 v voltage swing i o = -20a, -v b = -v s -10v -v s + 6.0 -v s + 5.0 v current, continuous, dc 20 a slew rate, a v = -10 c c = 100pf 12 14 v/s specifications p r o d u c t i n n o v a t i o n f r o m
mp240 mp240u 3 notes: 1. unless otherwise noted: t c = 25c, compensation c c = 680pf, dc input specifcations are value given, power supply voltage is typical rating. amplifer operated without boost feature. 2. long term operation at the maximum junction temperature will result in reduced product life. derate internal power dissipation to achieve high mtbf. 3. doubles for every 10c of case temperature increase. 4. +v s and -v s denote the + and - output stage supply voltages. +v b and -v b denote the + and - input stage supply voltages (boost voltages). 5. rating applies if the output current alternates between both output transistors at a rate faster than 60hz. 6. power supply voltages +v b and -v b must not be less than +v s and -v s respectively. parameter test conditions min typ max units settling time, to 0.1% a v = -1, 10v step, c c = 680pf 5 s resistance, open loop dc, 10a load 0.2 ? power supply voltage 15 75 100 v current, quiescent, total 16.5 25 ma current, shutdown or class c quiescent 8.5 ma current, boost supply 8.5 ma thermal resistance, ac, junction to case (note 5) full temp range, f 60hz 0.58 c/w resistance, dc, junction to case full temp range, f < 60hz 0.73 c/w resistance, junction to air full temp range 14 c/w temperature range, case -40 85 c -in +in +vb -vb cc2 out gnd gnd 1 2 3 4 5 6 7 8 39 40 37 38 36 35 34 33 41 42 -vs out cc1 nc -vs -i lim +i lim cc notes: c c is npo (cog) rated for full supply voltage +v s to -v s . both pins 2 and 40 required connected to signal ground. c2 and c3 electrolytic 10f per amp output current. c1 and c4 high quality ceramic 0.1f. see text for selection of values for rs1 - rs4. view from component side phase compensation gain w/o boost c c 1 680pf 330pf 3 100pf 10 + c1 c2 c4 + c3 r lim 9 10 11 12 30 32 31 29 +vs +vs +vs -vs out out out out nc 20 13 14 15 16 17 18 19 24 23 22 25 26 27 28 21 +vs +vs +vs out out out -vs -vs -vs out out out load & nc nc nc lsd hsd feedback gain w/boost typ. slew rate 3 3v/s 6v/s 6 14v/s 13 iq rs1 rs4 rs3 rs2 external connections 42-pin dip package style fc p r o d u c t i n n o v a t i o n f r o m
mp240 4 mp240u frequency 0 20 40 60 80 100 120 10 100 1k 10k 100k 1m 2m open loop gain, a (db) 1 - c c = 100pf 2 - c c = 330pf 3 - c c = 680pf r l = 2.5 1 2 3 small signal response w/ boost small signal response w/o boost frequency, f(hz) 0 20 40 60 80 100 120 10 100 1k 10k 100k 1m 2m open loop gain, a (db) 1 2 3 1 - c c = 100pf 2 - c c = 330pf 3 - c c = 680pf r l = 2.5 w/o boost from -v s w/o boost from +v s with boost from -v s with boost from +v s 0 5 10 15 20 0 2 4 6 output current, i o (a) voltage drop from supply, (v) output voltage swing t c = 25oc 50ms pulse 1 3 5 7 -40 -20 0 20 40 60 80 100 0 50 100 150 power derating case temperature. t c (c) internal power dissipation, p (w) -50 -25 0 25 50 75 100 70 80 90 100 110 120 130 case temperature. t c (c) normalized current limit, (%) current limit -40 -20 0 20 40 60 80 100 90 100 110 120 130 quiescent current vs temperature case temperature, (c) normalized quiescent current, i q (%) 30 100 1k 10k 30k frequency, f (hz) harmonic distortion distortion, thd (%) a v = 16 c c = 100pf +/-v s = 60v r l = 8 p o = 1w p o = 10w p o = 150w 0.001 0.01 0.1 1 10 10ms, tc = 25c 100ms, tc = 25c dc, tc = 25c dc, tc = 85c phase response w/o boost phase , ( ) frequency, f(hz) 100k 1m 2m 180 150 120 90 c c = 680pf c c = 100pf r l = 2.5 c c = 330pf 50k phase response w/boost phase , ( ) frequency, f(hz) 100k 1m 2m 180 150 120 90 c c = 680pf c c = 330pf c c = 100pf r l = 2.5 50k power response output voltage, v o (v p-p ) 20 200 frequency, f(hz) 1k 100k 500k c c = 100pf c c = 330pf c c = 680pf 10k 100 t c = 25c t c = -40c t c = 85c total supply voltage, v s (v) normalized quiescent current, i q (%) quiescent current vs supply 40 80 120 160 200 0 40 80 120 160 200 safe operating area supply to output differential, v s - v o (v) output current from +v s or -v s (a) 1 10 100 200 30 10 1 0.5 200 5 typical performance graphs p r o d u c t i n n o v a t i o n f r o m
mp240 mp240u 5 typical application motor position control the mosfet output stage of the mp240 provides supe - rior soa performance compared to bipolar output stages where secondary breakdown is a concern. the extended soa is ideal in motor drive applications where the back emf of the motor may impose simultaneously both high voltage and high current across the output stage transis - tors. in the fgure above a mechanical to electrical feed - back position converter allows the mp240 to drive the mo - tor in either direction to a set point determined by the dac voltage. the mp400 is ideally suited to driving both piezo actua - tion and defection applications off of a single low voltage supply. the circuit above boosts a system 24v buss to 350v to drive an ink jet print head. the mp400s high speed defection amplifer is biased for single supply operation by external resistors r2 C r6, so that a 0 to 5v dac can be used as the input to the amplifer to drive the print head from 0 to >300v . general please read application note 1 general operating considerations which covers stability, power supplies, heat sinking, mounting, current limit, soa interpretation, and specifcation interpretation. visit www.cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit, heat sink selection, apex precision powers complete application notes library, technical seminar workbook and evaluation kits. ground pins the mp240 has two ground pins (pins 2, 40). these pins provide a return for the internal capacitive bypassing of the small signal stages of the mp240. the two ground pins are not connected together on the substrate. both of these pins are required to be connected to the system signal ground. balancing resistor selection (r s1 -r s4 ) the mp240 uses parallel sets of output transistors. to ensure that the load current is evenly shared among the transistors external balancing resistors r s1 -r s4 are required. to calculate the required value for each of the resistors use: r = 4.5/i 2 ,where i is the maximum expected output current. for example, with a maximum output current of 10a each balancing resistor should be 0.045 ohms. each resistor dissipates 1.125w at the maximum current. use a non-inductive 2w rated resistor. a ready source for such resistors is the irc resistor series lr available from mouser electronics. safe operating area the mosfet output stage of the mp240 is not limited by second breakdown considerations as in bipolar output stages. only thermal considerations and current handling capabilities limit the soa (see safe operating area graph on previous page). the output stage is protected against transient fyback by the parasitic diodes of the output stage mosfet structure. however, for protection against sustained high energy fyback external fast-recovery diodes must be used. compensation the external compensation capacitor c c is connected to pins 4 and 6. unity gain stability can be achieved with c c = 680pf for a minimum phase margin of 60 degrees. at higher gains more phase shift can usually be tolerated and c c can be reduced resulting in higher bandwidth and slew rate. use the typical operating curves as a guide to select c c . a 200v npo (cog) type capacitor is required. boost operation requires more compensation or higher gains than with normal operation due to the increased capacitance of the output transistors when the output signal swings close to the supply rails. cc 42 41 +vs -vs 6 out 38 1 dac output position command 2 21-23 27-29 40 36 cc2 cc1 gnd gnd +vb +vs -vb -vs motor drive 4 position feedback -i lim +i lim r lim 35 * out 9-11 15-17 24-26 30-32 * 12-14 18-20 rs1 rs2 rs3 rs4 p r o d u c t i n n o v a t i o n f r o m
mp240 6 mp240u overvoltage protection although the mp240 can withstand differential input voltages up to 25v, in some applications additional external protection may be needed. 1n4148 signal diodes connected anti-parallel across the input pins is usually suf - fcient. in more demanding applications where bias current is important diode connected jfets such as 2n4416 will be required. see q1 and q2 in figure 1. in either case the differential input voltage will be clamped to 0.7v. this is suffcient overdrive to produce the maximum power band - width. some applications will also need over-voltage protection devices connected to the power supply rails. unidirectional zener diode transient suppressors are recommended. the zeners clamp transients to voltages within the power supply rating and also clamp power supply reversals to ground. whether the zeners are used or not the system power supply should be evaluated for transient performance including power-on over - shoot and power-off polarity reversals as well as line regulation. see z1 and z2 in figure 1. power supply bypassing bypass capacitors to power supply terminals +v s and -v s must be connected physically close to the pins to prevent local para - sitic oscillation in the output stage of the mp240. use electrolytic capacitors at least 10f per output amp required. bypass the electrolytic capacitors with high quality ceramic capacitors 0.1f or greater. in most applications power supply terminals +v b and -v b will be connected to +v s and -v s respectively. although +v b and -v b are bypassed internally it is recommended to bypass +v b and -v b with 0.1f externally. additionally ground pins 2 and 40 must be connected to the system signal ground. current limit the two current limit sense lines are to be connected directly across the cur - rent limit sense resistor. for the current limit to work correctly pin 36 must be connected to the amplifer output side and pin 35 connected to the load side of the current limit resistor r lim as shown in figure 2. this connection will bypass any parasitic resistances r p , formed by socket and solder joints as well as internal amplifer losses. the current limiting resistor may not be placed anywhere in the output circuit except where shown in figure 2. the value of the current limit resistor can be calculated as follows: r lim = .65/i limit boost operation with the boost feature the small signal stages of the amplifer are operated at a higher supply voltages than the amplifers high current output stage. +v b (pin 1) and -v b (pin 38) are connected to the small signal stages. an additional 10v on the +v b and -v b pin is suffcient to allow the small signal stages to drive the output stage into the triode region and improve the output voltage swing for extra effcient operation when required. when the boost feature is not needed +v s and -v s are connected to +v b and -v b respectively. +v b and -v b must not be operated at supply voltages less than +v s and -v s respectively. shutdown the output stage is turned off by applying a 5v level to hsd (pin 8) relative to lsd (pin 7). this is a non-latching circuit. as long as hsd remains high relative to lsd the output stage will be turned off. lsd will normally be tied to signal ground but lsd may foat from -v b to +v b - 15v. shutdown can be used to lower quiescent current for standby operation or as part of a load protection circuit. bias class option normally pin 5 (iq) is left open. but when pin 5 is connected to pin 6 (cc1) the quiescent current in the output stage is disabled. this results in lower quiescent power, but also class c operation of the output stage and the resulting crossover distortion. in many applications, such as driving motors, the distortion may be unimportant and lower standby power dissipation is an advantage. 42 41 +vs -vs out 38 1 2 40 gnd gnd +vb +vs -vb -vs z1 z2 -in +in q1 q2 figure 1: overvoltage protection 42 out 41 -i lim +i lim 35 36 r p r lim r l in r f r in figure 2: 4 wire current limit p r o d u c t i n n o v a t i o n f r o m
mp240 mp240u 7 contacting cirrus logic support for all apex precision power product questions and inquiries, call toll free 800-546-2739 in north america. for inquiries via email, please contact apex.support@cirrus.com. international customers can also request support by contacting their local cirrus logic sales representative. to fnd the one nearest to you, go to www.cirrus.com important notice cirrus logic, inc. and its subsidiaries ("cirrus") believe that the information contained in this document is accurate and reliable. however, the information is subject to change without notice and is provided "as is" without warranty of any kind (express or implied). customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnifcation, and limitation of liability. no responsibility is assumed by cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. this document is the property of cirrus and by furnishing this information, cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. cirrus owns the copyrights associated with the information contained herein and gives con - sent for copies to be made of the information only for use within your organization with respect to cirrus integrated circuits or other products of cirrus. this consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe prop - erty or environmental damage (critical applications). cirrus products are not designed, authorized or warranted to be suitable for use in products surgically implanted into the body, automotive safety or security devices, life support prod - ucts or other critical applications. inclusion of cirrus products in such applications is understood to be fully at the cus - tomers risk and cirrus disclaims and makes no warranty, express, statutory or implied, including the implied warranties of merchantability and fitness for particular purpose, with regard to any cirrus product that is used in such a manner. if the customer or customers customer uses or permits the use of cirrus products in critical applications, customer agrees, by such use, to fully indemnify cirrus, its officers, directors, employees, distributors and other agents from any and all liability, including attorneys fees and costs, that may result from or arise in connection with these uses. cirrus logic, cirrus, and the cirrus logic logo designs, apex precision power, apex and the apex precision power logo designs are trademarks of cirrus logic, inc. all other brand and product names in this document may be trademarks or service marks of their respective owners. p r o d u c t i n n o v a t i o n f r o m
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